The rapid development of computing platforms has widened the gap between the computing system and memory system, placing more pressure on cache, which is an integral part of the memory system. Despite numerous studies on cache management policies to optimize resource usage, some of them cannot keep up with the fast-paced trends in computing devices. Many of the state-of-the-art cache replacement policies and prefetchers in our research group are based on simulators with simple hardware abstraction for easy development and prototyping, but they do not support more realistic environments, such as cache coherence and heterogeneous systems. This thesis aims to experimentally transplant several cache management policies to more advanced simulato...
The current trend in a processor design has moved from multicore to manycore (tens to hundreds, or m...
Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Compute...
Written by leading researchers from academia and industry, this monograph provides students, researc...
Cache performance is critical in cache-based supercomputers, where the cache-miss/cache-hit memory r...
The increasing speed gap between microprocessors and off-chip DRAM makes last-level caches (LLCs) a ...
Modern multi-core microprocessors cannot function anymore without memory caches, in multiple layers,...
Processing speeds are determined by how many instructions per cycle (IPC) a CPU can execute. However...
This paper presents a flexible multi-core cache memory simulator to design and evaluate memory hiera...
Cloud radio access network (CRAN) has been proposed for 5G mobile networks. The benefit of a CRAN in...
Processor speed has been increasing at a higher rate than the speed of memories over the last years....
This thesis proposes a buffered dual access mode cache to reduce power consumption in multicore cach...
El consumo de energía en las CPUs ha alcanzado un punto en que dificulta la disipación de calor, y l...
This dissertation addresses two sets of challenges facing processor design as the industry enters th...
Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Compute...
This thesis presents a novel dynamically reconfigurable active L1 instruction and data cache model, ...
The current trend in a processor design has moved from multicore to manycore (tens to hundreds, or m...
Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Compute...
Written by leading researchers from academia and industry, this monograph provides students, researc...
Cache performance is critical in cache-based supercomputers, where the cache-miss/cache-hit memory r...
The increasing speed gap between microprocessors and off-chip DRAM makes last-level caches (LLCs) a ...
Modern multi-core microprocessors cannot function anymore without memory caches, in multiple layers,...
Processing speeds are determined by how many instructions per cycle (IPC) a CPU can execute. However...
This paper presents a flexible multi-core cache memory simulator to design and evaluate memory hiera...
Cloud radio access network (CRAN) has been proposed for 5G mobile networks. The benefit of a CRAN in...
Processor speed has been increasing at a higher rate than the speed of memories over the last years....
This thesis proposes a buffered dual access mode cache to reduce power consumption in multicore cach...
El consumo de energía en las CPUs ha alcanzado un punto en que dificulta la disipación de calor, y l...
This dissertation addresses two sets of challenges facing processor design as the industry enters th...
Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Compute...
This thesis presents a novel dynamically reconfigurable active L1 instruction and data cache model, ...
The current trend in a processor design has moved from multicore to manycore (tens to hundreds, or m...
Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Compute...
Written by leading researchers from academia and industry, this monograph provides students, researc...