As technology scales, the increased vulnerability of modern systems due to unreliable components becomes a major problem in the era of multi-/many-core architectures. Recently, several on-line testing techniques have been proposed, aiming towards error detection of wear-out/aging-related defects that can appear during the lifetime of a system. In this work, firstly we investigate the relation between system test latency and test-time overhead in multi-/many-core systems with shared Last-Level Cache (LLC) for periodic Software-Based Self-Testing (SBST), under different test scheduling policies. Secondly, we propose a new methodology aiming to reduce the extra overhead related to testing that is incurred as the system scales up (i.e., the num...
Abstract. Software based self-testing of embedded processor cores provides an excellent technique fo...
In recent years the complexity of System-On-Chips have been grown exponentially, mainly due to the e...
Instruction-based self-testing of embedded processor cores provides an excellent technique for balan...
More pronounced aging effects, more frequent early-life failures, and incomplete testing and verific...
Aggressive technology scaling triggers novel challenges to the design of multi-/many-core systems, s...
Software self-testing for embedded processor cores based on their instruction set, is a topic of inc...
Concurrent autonomous self-test, or online self-test, allows a system to test itself, concurrently d...
Electronic Control Units based on a multi-core architecture are commonly found in the automotive dom...
A comprehensive online test strategy requires both concurrent and non-concurrent fault detection cap...
In recent years the complexity of System-On-Chips growth exponentially, mainly due to the ever-incre...
Traditionally, the usage of caches and deterministic execution of on-line self-test procedures have ...
Today’s nanometer technology trends have a very negative impact on the reliability of semiconductor ...
Software based self-testing of embedded processor cores provides an excellent technique for balancin...
Today’s computers have gigabytes of main memory due to improved DRAM density. As density increases, ...
This paper presents a novel and efficient method of designing an online self-testable multi-core sys...
Abstract. Software based self-testing of embedded processor cores provides an excellent technique fo...
In recent years the complexity of System-On-Chips have been grown exponentially, mainly due to the e...
Instruction-based self-testing of embedded processor cores provides an excellent technique for balan...
More pronounced aging effects, more frequent early-life failures, and incomplete testing and verific...
Aggressive technology scaling triggers novel challenges to the design of multi-/many-core systems, s...
Software self-testing for embedded processor cores based on their instruction set, is a topic of inc...
Concurrent autonomous self-test, or online self-test, allows a system to test itself, concurrently d...
Electronic Control Units based on a multi-core architecture are commonly found in the automotive dom...
A comprehensive online test strategy requires both concurrent and non-concurrent fault detection cap...
In recent years the complexity of System-On-Chips growth exponentially, mainly due to the ever-incre...
Traditionally, the usage of caches and deterministic execution of on-line self-test procedures have ...
Today’s nanometer technology trends have a very negative impact on the reliability of semiconductor ...
Software based self-testing of embedded processor cores provides an excellent technique for balancin...
Today’s computers have gigabytes of main memory due to improved DRAM density. As density increases, ...
This paper presents a novel and efficient method of designing an online self-testable multi-core sys...
Abstract. Software based self-testing of embedded processor cores provides an excellent technique fo...
In recent years the complexity of System-On-Chips have been grown exponentially, mainly due to the e...
Instruction-based self-testing of embedded processor cores provides an excellent technique for balan...