Single-Ended 10T SRAM Cell with Improved Stability

In this work, a single-ended 10T static random access memory (SRAM) cell is presented. Proposed cell employs Schmitt- trigger (ST) based inverter to enhance read stability. Single ended feature of the cell saves switching power. Simulation is carried out on 180nm technology using Cadence. Results revealed that our cell provides 1.40x larger read static noise margin (RSNM) compared to conventional 6T cell at 0.7V. During write ‘0’ proposed cell offers 312mV of write static noise margin (WSNM) at 0.7V. During read operation, our cell offers 3.29x lower switching power compared to 6T cell. Standby power dissipation in proposed cellis1.16x of convention 6T cell at 0.7V