Software (kernel source code, simulator code, application source code, and experiment scripts) for the complete workflow necessary to generate and analyze the characterizations and results detailed in our manuscript, "Architectural Support for Optimizing Huge Page Selection Within the OS." We have provided public access to the simulation infrastructure we have created to model the virtual memory hierarchy and its interactions with our proposed Promotion Candidate Cache (PCC) design, the necessary software infrastructure to perform simulations and real-system evaluations, the applications and datasets (networks) we evaluated, and the experiment scripts we have written to automate the evaluation of our work. The README in promotion_candidate_...
In computer architecture design, a number of candidate designs are simulated on representative workl...
Application performance on computer processors depends on a number of complex architectural and micr...
iAbstract As processor cycle times decrease, memory system performance becomes ever more critical to...
Next generation computer systems will have gigabytes of physical memory and processors in the 200 MI...
The emergence of Big Data in recent years has led to a growing need in data processing and an increa...
The performance of a computing system heavily depends on the memory hierarchy. Fast but expensive ca...
We describe novel techniques used for efficient simulation of memory in SimICS, an instruction leve...
The expeditious proliferation of Internet connectivity and the growing adoption of digital products ...
This simulation tool allows the user to explore different computer architectures with hardware suppo...
With energy-efficient architectures, including accelerators and many-core processors, gaining tracti...
The design of hardware for next-generation exascale computing systems will require a deep understand...
Computer simulation has become increasingly important in many scientiï¬c disciplines, but its perfor...
Cache partitioning and sharing is critical to the effective utilization of multicore processors. How...
We describe novel techniques used for efficient simulation of memory in SimICS, an instruction level...
For more than a decade single compute core performance is no longer doubling every 18-24months. Phys...
In computer architecture design, a number of candidate designs are simulated on representative workl...
Application performance on computer processors depends on a number of complex architectural and micr...
iAbstract As processor cycle times decrease, memory system performance becomes ever more critical to...
Next generation computer systems will have gigabytes of physical memory and processors in the 200 MI...
The emergence of Big Data in recent years has led to a growing need in data processing and an increa...
The performance of a computing system heavily depends on the memory hierarchy. Fast but expensive ca...
We describe novel techniques used for efficient simulation of memory in SimICS, an instruction leve...
The expeditious proliferation of Internet connectivity and the growing adoption of digital products ...
This simulation tool allows the user to explore different computer architectures with hardware suppo...
With energy-efficient architectures, including accelerators and many-core processors, gaining tracti...
The design of hardware for next-generation exascale computing systems will require a deep understand...
Computer simulation has become increasingly important in many scientiï¬c disciplines, but its perfor...
Cache partitioning and sharing is critical to the effective utilization of multicore processors. How...
We describe novel techniques used for efficient simulation of memory in SimICS, an instruction level...
For more than a decade single compute core performance is no longer doubling every 18-24months. Phys...
In computer architecture design, a number of candidate designs are simulated on representative workl...
Application performance on computer processors depends on a number of complex architectural and micr...
iAbstract As processor cycle times decrease, memory system performance becomes ever more critical to...