Abstract We solve the two challenges architects face when designing heterogeneous processors with cache coherent shared memory. First, we develop an automated tool, called HeteroGen, for composing clusters of cores, each with its own coherence protocol. Second, we show that the output of HeteroGen adheres to a precisely defined memory consistency model that we call a compound consistency model. For a wide variety of protocols --- including the MOESI variants, as well as those that are targeted towards Total Store Order and Release Consistency --- we show that HeteroGen can correctly fuse them. To validate HeteroGen, we develop the first litmus tests for verifying that heterogeneous protocols satisfy compound consistency models. To understa...
New generation System-on-Chips will be extremely complex devices, composed from complex subsystems, ...
Weak memory consistency models can maximize system performance by enabling hardware and compiler opt...
Thesis (Ph. D.)--University of Washington, 1987Shared-memory multiprocessors offer increased computa...
Hardware dependencies Any PC with at least 16GB of RAM suffices to run most tests and these will co...
We solve the two challenges architects face when designing heterogeneous processors with cache coher...
The end of Dennard scaling and Moore's law has motivated a rise in the use of parallelism and hardwa...
In embedded system-on-a-chip (SoC) applications, the need for integrating heterogeneous processors i...
As the benefits from transistor scaling slow down, specialization is becoming increasingly important...
This paper explores area/parallelism tradeoffs in the design of distributed shared-memory (DSM) mult...
In embedded system-on-a-chip (SoC) applications, the demand for integrating heterogeneous processors...
Improvements in semiconductor technology now enable Chip Multiprocessors (CMPs). As many future comp...
Cache coherence is one of the main challenges to tackle when designing a shared-memory multiprocesso...
In a multiprocessor system-on-chip (MPSoC) private caches introduce the cache coherence problem. Her...
Today’s mobile, desktop, and server processors are heterogeneous, consisting not only of CPUs but al...
With the advent of multicores, parallel programming has gained a lot of importance. For parallel pr...
New generation System-on-Chips will be extremely complex devices, composed from complex subsystems, ...
Weak memory consistency models can maximize system performance by enabling hardware and compiler opt...
Thesis (Ph. D.)--University of Washington, 1987Shared-memory multiprocessors offer increased computa...
Hardware dependencies Any PC with at least 16GB of RAM suffices to run most tests and these will co...
We solve the two challenges architects face when designing heterogeneous processors with cache coher...
The end of Dennard scaling and Moore's law has motivated a rise in the use of parallelism and hardwa...
In embedded system-on-a-chip (SoC) applications, the need for integrating heterogeneous processors i...
As the benefits from transistor scaling slow down, specialization is becoming increasingly important...
This paper explores area/parallelism tradeoffs in the design of distributed shared-memory (DSM) mult...
In embedded system-on-a-chip (SoC) applications, the demand for integrating heterogeneous processors...
Improvements in semiconductor technology now enable Chip Multiprocessors (CMPs). As many future comp...
Cache coherence is one of the main challenges to tackle when designing a shared-memory multiprocesso...
In a multiprocessor system-on-chip (MPSoC) private caches introduce the cache coherence problem. Her...
Today’s mobile, desktop, and server processors are heterogeneous, consisting not only of CPUs but al...
With the advent of multicores, parallel programming has gained a lot of importance. For parallel pr...
New generation System-on-Chips will be extremely complex devices, composed from complex subsystems, ...
Weak memory consistency models can maximize system performance by enabling hardware and compiler opt...
Thesis (Ph. D.)--University of Washington, 1987Shared-memory multiprocessors offer increased computa...