High-Speed Serializer for a 64 GS/s Digital-to-Analog Converter in a 28 nm Fully-Depleted Silicon-on-Insulator CMOS Technology

This data set contains simulation results of a high-speed serializer for a 64 GS s-1 digital-to-analog converter. The circuit is presented in the paper "High-Speed Serializer for a 64 GS s-1 Digital-to-Analog Converter in a 28 nm Fully-Depleted Silicon-on-Insulator CMOS Technology" in the open access journal "Advances in Radio Science".This research is supported by Deutsche Forschungsgemeinschaft (DFG - BE 2256/27-1)