A 2-mA charge-balanced neurostimulator in 0.18-μm/1.8 V standard CMOS process

This paper presents a programmable neuro-stimulator 4×VDD with 7.2 V operating voltage in a 0.18-mm/1.8 V CMOS process. The output voltage compliance exceeds 6.2 V. A current gain control is designed to adjust bias current. A 5-bit current mode digital-to-analog converter (DAC) is used to set delivered current in current driver. A high output impedance current mirror is designed to guarantee charge balancing. The charge mismatch after biphasic stimulation is about 0.14%. Moreover, current mirrors are turned off after stimulation to decrease power consumption. The headroom voltage is about 1 V for all the voltage drivers and the current mirrors. The proposed neuro-stimulator occupies 0.95×0.95 mm2 with a maximum current range of 0~2000 µA and power consumption less than 60 µ