Space DPU: Constructing a Radiation-Tolerant, FPGA-based Platform for Deep Learning Acceleration on Space Payloads

Deep learning techniques based on neural networks are of interest for a variety of on-board processing applications in Space spanning areas such as scientific analysis, object detection and image classification (e.g., cloud detection). However, the impact of single event effects on high-performance hardware platforms capable of accelerating compute-intensive deep neural networks is an area of concern. In this paper, we present the architecture and design of a reconfigurable, FPGA-based platform that combines Xilinx's Deep Learning Processing Unit (DPU) for Convolution Neural Networks with reliability enhancements for Space deployments. These enhancements include integrating the DPU with Xilinx's Triple Modular Redundancy (TMR) MicroBlaze subsystem, which provides a fault-tolerant and fail-safe host processor for dynamically deploying and managing neural networks in on-board processing applications, in addition to Xilinx's Single Event Upset Mitigation (SEM) IP for real-time detection and correction of soft errors. Furthermore, a technique for Fault Aware Training developed by Xilinx Research Labs is applied and tested on selected neural networks for image classification and object detection: resnet-18 and Tiny-YOLOv2, respectively. The platform was beam-tested on a commercially available Xilinx KCU105 board, demonstrating a substantial reduction in classification degradation relative to standard, non-mitigated approaches, and the architecture is directly transferable to Xilinx's Space-grade, Radiation-Tolerant Kintex UltraScale XQRKU060 devices for production deployments. We will summarize results from the existing work and outline approaches for scaling and encapsulating the design into a Vitis Target Platform for compatibility with Xilinx’s mainstream Vitis Acceleration flow and Vitis AI tools