Transforming Mold Process Capability towards a Cost Effective Solution

Encapsulating a semiconductor device is achieved by using either Compression molding or Transfer molding. Compression molding is highly recommended in a map configuration, like in quad flat no leads (QFN) packages, with a very complex wirebonding profile characterized by long wire span and thinner wire diameter. However, on a configuration like chip on leads (COL) with very limited wires, profit margin is compromised due to the direct and indirect materials cost contribution. Herein, evaluation of transfer molding is explored for package feasibility, cost benefit and process capability. All potential risks and defined mitigation plans are carefully assessed to achieve product manufacturability on a thin mold profile