FPGA DESIGN OF CLUTTER GENERATOR FOR RADAR TESTING

Detection of weak target echo in the presence of strong clutter is the main objective of any RADAR. To evaluate the performance of RADAR it is required to generate the clutter of various types including land and sea. This clutter is of non Gaussian distribution such as lognormal, Weibull and k-type. In this project it is proposed to develop a clutter generation algorithm of given distribution type. This process consists of random number generator with Gaussian distribution converting into a non Gaussian using ZMNL (Zero Memory Nonlinearity Transformation) technique. It also includes amplitude shaping and addition other interference signals. The complete algorithm is first simulated using Xilinx ISE 9.2i and would be implemented in VIRTEX-V FPGA.This algorithm will be used for the testing of RADAR system. Results are compared with standard results