This paper presents the development of a single-ended 38.5 kS/s 10-bit programmable reference SAR ADC which is realized in MIMOS’s 0.35 µm CMOS process. The design uses a resistive DAC, a dynamic comparator with pre-amplifier and a SAR digital logic to create 10 effective bits ADC. A programmable reference circuitry allows the ADC to operate with different input range from 0.6 V to 2.1 V. The ADC consumed less than 7.5 mW power with a 3 V supply
An 5.1 μW, 1.8 V, 8-bit, successive approximation (SAR) analog-to-digital converter (ADC) using 10 k...
In recent years, there has been a growing need for Successive Approximation Register (SAR) Analog-to...
This paper presents a 10 b 80 kS/s SAR ADC with low-power duty-cycled reference generation. It gener...
This paper presents the development of a single-ended 38.5 kS/s 10-bit programmable reference SAR AD...
This paper presents the development of a 38.5 kS/s 10-bit low power SAR ADC which is realized in MIM...
In this paper a low power consuming 10 bit SAR ADC which is suitable for Biomedical applications is ...
An 11-bit 10 MS/s successive approximation register (SAR) analog-to-digital converter (ADC) is propo...
In this project, a 10-bit SAR ADC is proposed and designed. The ADC is set to use a power supply o...
This paper presents a low power successive approximation register (SAR) ADC and its front-end automa...
This brief presents a 10.5-bit 10 MS/s successive-approximation-register (SAR) analog-to-digital con...
A proposed prototype of a 10-bit 1 MS/s single-ended asynchronous Successive Approximation Register ...
A 10b 42MS/s power-efficient successive-approximation-register (SAR) analog-to-digital converter (AD...
approximation register (SAR) analog-to-digital converter (ADC) is fabricated in 65-nm CMOS. With the...
A pipelined ADC is generally used for high speeds and high resolutions in applications where latency...
This paper presents a 10-bit successive approximation register analog-to-digital converter with ener...
An 5.1 μW, 1.8 V, 8-bit, successive approximation (SAR) analog-to-digital converter (ADC) using 10 k...
In recent years, there has been a growing need for Successive Approximation Register (SAR) Analog-to...
This paper presents a 10 b 80 kS/s SAR ADC with low-power duty-cycled reference generation. It gener...
This paper presents the development of a single-ended 38.5 kS/s 10-bit programmable reference SAR AD...
This paper presents the development of a 38.5 kS/s 10-bit low power SAR ADC which is realized in MIM...
In this paper a low power consuming 10 bit SAR ADC which is suitable for Biomedical applications is ...
An 11-bit 10 MS/s successive approximation register (SAR) analog-to-digital converter (ADC) is propo...
In this project, a 10-bit SAR ADC is proposed and designed. The ADC is set to use a power supply o...
This paper presents a low power successive approximation register (SAR) ADC and its front-end automa...
This brief presents a 10.5-bit 10 MS/s successive-approximation-register (SAR) analog-to-digital con...
A proposed prototype of a 10-bit 1 MS/s single-ended asynchronous Successive Approximation Register ...
A 10b 42MS/s power-efficient successive-approximation-register (SAR) analog-to-digital converter (AD...
approximation register (SAR) analog-to-digital converter (ADC) is fabricated in 65-nm CMOS. With the...
A pipelined ADC is generally used for high speeds and high resolutions in applications where latency...
This paper presents a 10-bit successive approximation register analog-to-digital converter with ener...
An 5.1 μW, 1.8 V, 8-bit, successive approximation (SAR) analog-to-digital converter (ADC) using 10 k...
In recent years, there has been a growing need for Successive Approximation Register (SAR) Analog-to...
This paper presents a 10 b 80 kS/s SAR ADC with low-power duty-cycled reference generation. It gener...