D5.1: Market and Technology Watch Report Year1

This document is the first deliverable of PRACE-5IP Work Package 5 “Task 5.1 - Technology and market watch” and corresponds to a periodic annual update on technology and market trends. It is thus the continuation of a well-established effort to carry out an assessment of the HPC market based on market surveys, supercomputing conferences, and exchanges between vendors and experts involved in the work package. In summary, the TOP500 list is still dominated by systems based in China, but Japan is emerging in the Green500 list where the first EU system is ranked #10. In the last year, increased attention has been given to the HPCG benchmark list where the EU countries are ranked from #13 to #28. Overall, the number of EU systems decreased between November 2016 and November 2017 in all lists which were analysed. Among the most powerful HPC systems, NVIDIA GPUs appear to be the preferred accelerator followed by Xeon Phi, but future trends will drastically change after the announcement of its withdrawal by Intel. Plans for exascale are well-defined in China, USA and Japan with first prototype delivery dates estimated in 2020, 2021, 2021/2022, respectively. Europe is well in line with this worldwide trend with the EuroHPC project aiming at delivering the first exascale prototype in 2022/2023. HPC cloud services are dominated by commercial vendors while OpenStack solutions are gaining momentum - even if those technologies generally complement, rather than replace, the traditional HPC systems. Core technologies for HPC system processors mostly rely on Intel Sky/Cascade/Ice Lake silicon development for present and near future X86 systems. AMD has emerged with the EPYC processor and IBM with its POWER9. ARM technology adoption seems to be on the rise with the release of the new SoC(s) which is comparable to the Cavium ThunderX2 with core-by-core performance similar to the Skylake processor. Trends in accelerators for HPC systems mostly rely on NVIDIA GPUs with the Volta V100 engine, but the PEZY processor (in Japan), FPGA and RISC-V compute engines are also playing a role in the development of future HPC architectures. 3D memory subsystems are emerging as successors of current DRAM technology, while NVM DIMMS are reaching the market to support (and eventually replace) SSD in cache design. This will drastically improve I/O performance which are expected in near future high-end storage subsystems