LOW POWER SRAM DESIGNS: A REVIEW

With on growing technology scaling, low power operation has become important in VLSI design. SRAM consists large portion of the modern VLSI designs, thus efforts are being made to design low power SRAM using different ways. This paper discusses various existing SRAM designs, consisting of different number of transistors from one another. This paper focuses on the study of these designs and their comparison on the basis of parameters like power dissipation, access time , stability and power delay product. All the SRAM designs has different read write operation and hence different results. It was found that 12T SRAM has better performance in case of power dissipation and power dealy product but high access time than the other existing SRAM cells when compared on the basis of simulation results obtained on 45nm environment using Microwind tool