The Sophon SG2042 is the world's first commodity 64-core RISC-V CPU for high performance workloads and an important question is whether the SG2042 has the potential to encourage the HPC community to embrace RISC-V. In this paper we undertaking a performance exploration of the SG2042 against existing RISC-V hardware and high performance x86 CPUs in use by modern supercomputers. Leveraging the RAJAPerf benchmarking suite, we discover that on average, the SG2042 delivers, per core, between five and ten times the performance compared to the nearest widely available RISC-V hardware. We found that, on average, the x86 high performance CPUs under test outperform the SG2042 by between four and eight times for multi-threaded workloads, although so...
As high-performance computing (HPC) systems advance towards exascale (10^18 operations per second), ...
In this paper we take a look at what the Intel Xeon Processor 7500 family, code namedNehalem-EX, bri...
In recent years the designs of High Performance Computing (HPC) clusters have become more complex. T...
HEPScore is a new CPU benchmark created to replace the HEPSPEC06 benchmark that is currently used by...
Marvell’s ThunderX2 has been the first Arm-based processor with deployments in large-scale HPC produ...
For years, SIMD/vector units have enhanced the capabilities of modern CPUs in High-Performance Compu...
The emergence of a new, open, and free instruction set architecture, RISC-V, has heralded a new era ...
In this work, fundamental performance, power, and energy characteristics of the full SPEChpc 2021 be...
In this paper, we present Ara, a 64-bit vector processor based on the version 0.5 draft of RISC-V's ...
When designing embedded systems, especially for space-computing needs, finding the ideal balance bet...
The thesis evaluates the current state-of-the-art of RISC architectures in HPC. Studying the perform...
This thesis contains a detailed comparison of the computation and communication performance of two ...
The second generation of the Digital Equipment Corp. (DEC) DECchip Alpha AXP microprocessor is refer...
This Best Practice Guide (BPG) extends the previously developed series of BPGs by providing an updat...
We identify hardware that is optimal to produce molecular dynamics trajectories on Linux compute clu...
As high-performance computing (HPC) systems advance towards exascale (10^18 operations per second), ...
In this paper we take a look at what the Intel Xeon Processor 7500 family, code namedNehalem-EX, bri...
In recent years the designs of High Performance Computing (HPC) clusters have become more complex. T...
HEPScore is a new CPU benchmark created to replace the HEPSPEC06 benchmark that is currently used by...
Marvell’s ThunderX2 has been the first Arm-based processor with deployments in large-scale HPC produ...
For years, SIMD/vector units have enhanced the capabilities of modern CPUs in High-Performance Compu...
The emergence of a new, open, and free instruction set architecture, RISC-V, has heralded a new era ...
In this work, fundamental performance, power, and energy characteristics of the full SPEChpc 2021 be...
In this paper, we present Ara, a 64-bit vector processor based on the version 0.5 draft of RISC-V's ...
When designing embedded systems, especially for space-computing needs, finding the ideal balance bet...
The thesis evaluates the current state-of-the-art of RISC architectures in HPC. Studying the perform...
This thesis contains a detailed comparison of the computation and communication performance of two ...
The second generation of the Digital Equipment Corp. (DEC) DECchip Alpha AXP microprocessor is refer...
This Best Practice Guide (BPG) extends the previously developed series of BPGs by providing an updat...
We identify hardware that is optimal to produce molecular dynamics trajectories on Linux compute clu...
As high-performance computing (HPC) systems advance towards exascale (10^18 operations per second), ...
In this paper we take a look at what the Intel Xeon Processor 7500 family, code namedNehalem-EX, bri...
In recent years the designs of High Performance Computing (HPC) clusters have become more complex. T...