Design and Analysis Of Approximate Multiplier With Reconfigurable Reduction

For a variety of different applications, including processing of image, expert systems, the smart things, and processing of digital systems, low-power and high-speed electronic system are now required. In a general multiplying operation account for most of the data processing time. The potential solution for hardware that operates quickly and efficiently is approximate multiplier. The approximate multiplier has developed into a key arithmetic element for many applications over the past ten years. So, Identifying a suitable multiplier which makes the trade-off between power and efficiency is important. In this Paper, We compared different Approximate Multipliers and find the suitable one