A new topology of multilevel inverter with switches count reducing at symmetrical/asymmetrical mode

The multi-level inverter (MLI) has an important role in modern technologies due to its advantages. On the other hand, its circuits need a large number of switches, capacitors and direct current (DC) sources. This paper introduces a new topology for a MLI with a reduction in number of switches, no need for capacitors in exchange for an increase in number of levels in the output. The proposed model is operated in symmetric and asymmetric modes with the presence of resistive and inductive loads. Whereas, (5 and 9) output levels were obtained in symmetric and asymmetric modes, respectively. In contrast, the number of switches was halved and without need for capacitors, compared to the conventional MLI topologies not a secret that reducing the number of switches has the effect of reducing cost and complexity, in addition to the problems of balancing the voltage on capacitors. The programming environment used to build the proposed model of the MLI was MATLAB/Simulink, where the validity of the hypotheses contained in this paper were proved and the obtained results are identical to what was planned under different loads and different operation modes. In addition, the paper included a comparison study among the proposed topology and conventional topologies in terms of the number of switches, capacitors and sources