Digital System for Serial FSK Modulated Data Reception

This paper describes a complete software developed system, designed, implemented and tested, for the reception of serial, low rate, data transmitted employing binary FSK (Frequency Shift Keying) modulation. The FSK demodulation process is implemented using an algorithm for a digital version of a PLL (Phase Locked Loop) in software. The complete reception process is implemented using methodologies and techniques from the digital signal processing field and they are implemented using C language in a dsPIC microcontroller from Microchip