A Combined Digital Foreground Self-calibration Algorithm for Pipelined Analog-to-Digital Converter

In this paper, a combined digital foreground self-calibration algorithm is designed to calibrate the gain error and capacitor mismatch error in pipelined analog-to-digital converter (ADC). For the gain error, it is detected by digital circuit and calibrated by modifying the feedback capacitance in operational amplifier. Similarly, the capacitor mismatch error is also detected by digital circuit and calibrated by a specific formula. Finally, the calibration of pipelined ADC is accomplished by combining the two error calibration algorithm. For a 14-bit pipelined ADC with gain error and capacitor mismatch error, its performance is ENOB=8.62bit and SFDR=60.8dB.With the help of the algorithm presented in this paper, its performance can be improved to ENOB=13.37bit and SFDR=88.7dB