This work introduces a novel gate driver for use with wide-bandgap devices in high-power, high-precision applications. As power amplifiers move to higher operating frequencies, the dead time becomes a significant portion of the overall switching period, resulting in reduced control precision and increased output distortion. The developed driver allows to minimize the dead time inserted between the switching actions of a half-bridge. A prototype using 650 V gallium nitride transistors is developed to evaluate the concept. A low-cost digital isolator connects the high and low-side drivers and prevents cross conduction. As long as one switch is conducting, the other is prevented from turning on. This automatically ensures a minimal dead time d...
The paper deals with hardware solution of a fully digital dead-time generator. The circuit is applic...
International audienceThis paper presents an adaptive gate drive circuit to provide a safer and more...
This paper presents a voltage-controlled multistage gate driver topology for delay time minimization...
This work introduces a novel gate driver for use with wide-bandgap devices in high-power, high-preci...
Dead-time is introduced between the gating signals to the top and bottom switches in a voltage sourc...
This paper presents an adaptive dead-time control circuit for a maximum work frequency 20 MHz, maxim...
This paper presents a driver topology intended for WBG devices with the goal of improving the switch...
Wide-bandgap (WBG) semiconductors, such as gallium nitride (GaN), are more and more being used in sw...
Wide-bandgap (WBG) semiconductors, such as gallium nitride (GaN), are more and more being used in sw...
ABSTRACT: The Design of efficient, safe, and reliable circuits is a prime objective in high-voltage ...
Wide bandgap (WBG) power transistors such as SiC MOSFETs and GaN HEMTs are a real breakthrough in po...
One of the challenges in the application of GaN power HEMTs is designing the gate driver for optimal...
International audienceThis paper presents an AGD (active gate driver) implemented with a low voltage...
Researchers in power electronics have been optimizing silicon devices with novel structures and gate...
The increase of the switching speed in power semiconductors leads to converters with better efficien...
The paper deals with hardware solution of a fully digital dead-time generator. The circuit is applic...
International audienceThis paper presents an adaptive gate drive circuit to provide a safer and more...
This paper presents a voltage-controlled multistage gate driver topology for delay time minimization...
This work introduces a novel gate driver for use with wide-bandgap devices in high-power, high-preci...
Dead-time is introduced between the gating signals to the top and bottom switches in a voltage sourc...
This paper presents an adaptive dead-time control circuit for a maximum work frequency 20 MHz, maxim...
This paper presents a driver topology intended for WBG devices with the goal of improving the switch...
Wide-bandgap (WBG) semiconductors, such as gallium nitride (GaN), are more and more being used in sw...
Wide-bandgap (WBG) semiconductors, such as gallium nitride (GaN), are more and more being used in sw...
ABSTRACT: The Design of efficient, safe, and reliable circuits is a prime objective in high-voltage ...
Wide bandgap (WBG) power transistors such as SiC MOSFETs and GaN HEMTs are a real breakthrough in po...
One of the challenges in the application of GaN power HEMTs is designing the gate driver for optimal...
International audienceThis paper presents an AGD (active gate driver) implemented with a low voltage...
Researchers in power electronics have been optimizing silicon devices with novel structures and gate...
The increase of the switching speed in power semiconductors leads to converters with better efficien...
The paper deals with hardware solution of a fully digital dead-time generator. The circuit is applic...
International audienceThis paper presents an adaptive gate drive circuit to provide a safer and more...
This paper presents a voltage-controlled multistage gate driver topology for delay time minimization...