PROBLEM TO BE SOLVED: To provide a method for calibrating an analog-to-digital converter (ADC).SOLUTION: The method comprises: sampling an input voltage signal; comparing the sampled input voltage signal with an output signal of a feedback digital-to-analog converter (DAC) 40; determining in a search logic block 30 a digital code representation for a comparison result; and performing calibration by performing an additional cycle wherein the last comparison carried out for determining the least significant bit of the digital code representation is repeated with a second resolution mode different from a first resolution mode used in the last comparison, so obtaining an additional comparison, determining from the difference between the results...
This paper presents a generic foreground calibration algorithm that estimates and corrects memoryles...
During successive approximation analog to digital conversion a series of successive digital referenc...
Abstract — In this paper we present a 10-bit, two-bit per cycles successive-approximation A/D conver...
PROBLEM TO BE SOLVED: To provide a method for calibrating an analog-to-digital converter (ADC).SOLUT...
A method comprises sampling an input voltage signal, comparing the sampled input voltage signal with...
In this paper, a combined digital foreground self-calibration algorithm is designed to calibrate the...
[EN] The invention relates to an adaptive method for calibrating the offset of comparators in analog...
Abstract − The offset of an ADC is one of the main limitations for interleaved architectures. The me...
Abstract- This paper presents a reconfigurable, low offset, low noise and high speed dynamic clocked...
This paper presents a methodology for digitally calibrating analog circuits and systems. Based on th...
Abstract—This paper presents a background calibration tech-nique for trimming the input-referred off...
This paper presents a methodology for digitally calibrating analog circuits and systems. Based on th...
A foreground digital self-calibration technique that improves capacitor matching of a digital-to-ana...
This brief presents a low-cost digital technique for background calibration of comparator offsets in...
The device (20), that is an analog-digital converter, computes a sequence of output digital values (...
This paper presents a generic foreground calibration algorithm that estimates and corrects memoryles...
During successive approximation analog to digital conversion a series of successive digital referenc...
Abstract — In this paper we present a 10-bit, two-bit per cycles successive-approximation A/D conver...
PROBLEM TO BE SOLVED: To provide a method for calibrating an analog-to-digital converter (ADC).SOLUT...
A method comprises sampling an input voltage signal, comparing the sampled input voltage signal with...
In this paper, a combined digital foreground self-calibration algorithm is designed to calibrate the...
[EN] The invention relates to an adaptive method for calibrating the offset of comparators in analog...
Abstract − The offset of an ADC is one of the main limitations for interleaved architectures. The me...
Abstract- This paper presents a reconfigurable, low offset, low noise and high speed dynamic clocked...
This paper presents a methodology for digitally calibrating analog circuits and systems. Based on th...
Abstract—This paper presents a background calibration tech-nique for trimming the input-referred off...
This paper presents a methodology for digitally calibrating analog circuits and systems. Based on th...
A foreground digital self-calibration technique that improves capacitor matching of a digital-to-ana...
This brief presents a low-cost digital technique for background calibration of comparator offsets in...
The device (20), that is an analog-digital converter, computes a sequence of output digital values (...
This paper presents a generic foreground calibration algorithm that estimates and corrects memoryles...
During successive approximation analog to digital conversion a series of successive digital referenc...
Abstract — In this paper we present a 10-bit, two-bit per cycles successive-approximation A/D conver...