Applications of model order reduction for IC modeling

In order to avoid many expensive design iterations, in the electronics industry it is crucial to be able to simulate electrical behavior of integrated circuits before they are actually fabricated. A common trend in the industry is the increase of complexity and operation frequency, as well as the reduction in size of the devices. Due to these trends, many electromagnetic effects, such as capacitive coupling, inductive coupling, eddy currents, and radiation effects, become important and cannot be neglected. A typical required procedure is the so-called parasitic extraction of interconnect and substrate which usually lead to huge electrical circuits. Such extracted circuits cannot be used for direct simulations when coupled to other devices, and consequently they require innovative techniques for achieving this goal. Model Order Reduction (MOR) is playing an important role in simulation processes of interconnect and substrate structures and this role will become even more important in the future. The goal of Model Order Reduction is to reduce the size of a given model, while keeping exactly the same behavior or an adequate approximation of it. Obtained reduced model should be computationally more flexible, which makes it useful for further design steps. In the thesis we addressed several key aspects of MOR and answered the question on how to modify or adapt already existing MOR technique, in order to keep necessary physical properties such as passivity. Passivity is an important property, because even a stable system can become instable if it is combined with other components, unless they are passive. In the thesis we investigated a MOR technique, super node algorithm, which is used in electromagnetic tool Fasterix. It was observed that some reduced models obtained by the super node algorithm showed artificial behavior which rendered the simulations useless. We studied this problem and we were able to explain why and at which step of the super node algorithm passivity is lost. Moreover we proposed a modified version of the algorithm which guarantees passivity while retaining the main advantages of the original version of the super node algorithm. We also provide a set of numerical examples to validate the proposed approach. In addition to this we also studied the possibility of considering discetization methods as Model Oder Reduction techniques at the level of operator. Among these discretization methods we concentrated mainly on Boundary Element Method (BEM) and Finite Element Method (FEM). We discuss the idea of using BEM as a model order reduction technique for extraction of homogeneous substrates, and we compared the results to the alternative of using FEM. We also considered the problem of reduction of resistor networks arising from substrate extraction. This is due to the fact that existing exact reduction techniques could not sometimes provide a sufficient reduction. This finally led us to create a novel MOR technique for this kind of resistor networks. The idea of our approach is to improve sparsity of conductance matrix by replacing the original network by an approximate one with less resistors, while keeping the error within some given margin. The key of the approach is the analytical derivation of error bounds in terms of generalized eigenvalue problems, which with the adequate algorithms can be computed efficiently. Error bounds have been derived for the relative error of voltages and the maximum relative error of path resistances. In several numerical experiments, the proposed technique performs very well and appear very promising, especially for the case of multi-terminal resistor networks. The approach is versatile in the sense that it can be used in combination with already existing reduction techniques, for obtaining better reduced models, which is important for the design, development and optimization of electronic devices