System-level Analysis of an Ultra-Low Power, Low Data-rate FHSS Transceiver

The market of wireless connectivity is growing rapidly. Various standards have been developed to satisfy the market. The area of ultra-low power, low data rate applications aims to become one of the most attractive areas in terms of revenue. Possible fields of application for ultra-low power low data rate networks can be the following: domotica, automotive, health care etc. Ultra-low power wireless links require a careful definition of radio parameters and a new architectural approach, compared to moderate and high-speed multimedia wireless link, in order to make battery lifetime and therefore battery replacement practical to the consumer. To achieve the ultra-low power target, the radio link budget must be examinedand a careful study of the main system parameters is required. Furthermore this link budget is strictly related to the transmitted power, PTX, and the received signal power PRX. Starting from the definition of a radio link budget suitable for power constrained radio, all the basic radio parameters for a slow-hopping, Frequency Hopping Spread Spectrum (FHSS) transceiver are derived. These parameters include sensitivity, Noise Figure, spurious free dynamic range, phase noise, third order intercept point. The analysis demonstrates that the relaxed requirements on the radio side can allow the implementation of a single chip, ultra low power, low cost transceiver suitable for low data-rate applications, if reduced Quality of Service (QoS) can be tolerated