This paper presents an application domain driven approach to the design of embedded systems on silicon, and it shows how this approach is used to design a chip for a multi-window TV application. We discuss all major design steps in a logical order starting with an application domain analysis. This leads to the choice of Kahn data flow graphs as the programming paradigm for high-throughput signal applications. Based on this analysis we designed a multiprocessor architecture which uses a run-time reconfiguration. Finally, attention is directed towards the physical implementation and the deep-submicron problems we had to solve. The result is a chip that can manage up to 25 internal real-time video streams. The chip combines the flexibility of ...
A chip for the concurrent processing of many real time multi-media streams has three independent and...
This paper presents a generic multiprocessor architecture for video processing, featuring an array o...
This paper presents a generic multiprocessor architecture for video processing, featuring an array o...
This paper presents an application domain driven approach to the design of embedded systems on silic...
This paper presents an application domain driven approach to the design of embedded systems on silic...
This paper presents an application domain driven approach to the design of embedded systems on silic...
This paper presents an application domain driven approach to the design of embedded systems on silic...
This paper presents an application domain driven approach to the design of embedded systems on silic...
This paper presents an application domain driven approach to the design of embedded systems on silic...
A new video processing architecture for high-end TV applications is presented, featuring a flexible ...
A new video processing architecture for high-end TV applications is presented, featuring a flexible ...
The design of multimedia platforms is becoming increasingly more complex. Modern multimedia systems ...
A chip for the concurrent processing of many real time multi-media streams has three independent and...
A chip for the concurrent processing of many real time multi-media streams has three independent and...
A chip for the concurrent processing of many real time multi-media streams has three independent and...
A chip for the concurrent processing of many real time multi-media streams has three independent and...
This paper presents a generic multiprocessor architecture for video processing, featuring an array o...
This paper presents a generic multiprocessor architecture for video processing, featuring an array o...
This paper presents an application domain driven approach to the design of embedded systems on silic...
This paper presents an application domain driven approach to the design of embedded systems on silic...
This paper presents an application domain driven approach to the design of embedded systems on silic...
This paper presents an application domain driven approach to the design of embedded systems on silic...
This paper presents an application domain driven approach to the design of embedded systems on silic...
This paper presents an application domain driven approach to the design of embedded systems on silic...
A new video processing architecture for high-end TV applications is presented, featuring a flexible ...
A new video processing architecture for high-end TV applications is presented, featuring a flexible ...
The design of multimedia platforms is becoming increasingly more complex. Modern multimedia systems ...
A chip for the concurrent processing of many real time multi-media streams has three independent and...
A chip for the concurrent processing of many real time multi-media streams has three independent and...
A chip for the concurrent processing of many real time multi-media streams has three independent and...
A chip for the concurrent processing of many real time multi-media streams has three independent and...
This paper presents a generic multiprocessor architecture for video processing, featuring an array o...
This paper presents a generic multiprocessor architecture for video processing, featuring an array o...