This chapter discusses the chip-implementation and experimental verification of a sub-binary variable-radix DAC, according to the theory presented in Chapter 4. The circuit-level design is described in Section 1 and the layout in Section 2. The off-chip implementation of the self-measurement circuit is shown in Section 3. Then, experimental results and conclusions are given in Section 4 and Section 5, respectively.</p
The integration of digital and analog systems on single CMOS integrated circuits will continue to be...
This thesis studies the `smart' concept for application to analog-to-digital and digital-to-analog c...
This paper classifies correction methods for current-steering Digital-to-Analog Converters (DACs), w...
This chapter discusses the chip-implementation and experimental verification of a sub-binary variabl...
Due to the character of the original source materials and the nature of batch digitization, quality ...
This paper presents a methodology for digitally calibrating analog circuits and systems. Based on th...
This paper presents a methodology for digitally calibrating analog circuits and systems. Based on th...
This chapter presents the implementation and measurement results of two DAC test-chip implementation...
This chapter presents a flexible DAC design that features 4.12 bit sub-DAC cores and it is designed ...
In this paper, a solution is proposed for the design of reliable, high-performance current-steering ...
The object of study is digital-to-analog converter (DAC). The meaning of DAC, their design and contr...
While the string DAC and thermometer DAC architectures are by far the simplest, they are certainly n...
This chapter presents a flexible DAC design in 40 nm CMOS technology. It features large scale functi...
This paper presents design methodology and comparison of a 1-bit DAC in both 180 nm and 90 nm CMOS t...
In arithmetic circuits for digital signal processing, radixes other than two are often used to make ...
The integration of digital and analog systems on single CMOS integrated circuits will continue to be...
This thesis studies the `smart' concept for application to analog-to-digital and digital-to-analog c...
This paper classifies correction methods for current-steering Digital-to-Analog Converters (DACs), w...
This chapter discusses the chip-implementation and experimental verification of a sub-binary variabl...
Due to the character of the original source materials and the nature of batch digitization, quality ...
This paper presents a methodology for digitally calibrating analog circuits and systems. Based on th...
This paper presents a methodology for digitally calibrating analog circuits and systems. Based on th...
This chapter presents the implementation and measurement results of two DAC test-chip implementation...
This chapter presents a flexible DAC design that features 4.12 bit sub-DAC cores and it is designed ...
In this paper, a solution is proposed for the design of reliable, high-performance current-steering ...
The object of study is digital-to-analog converter (DAC). The meaning of DAC, their design and contr...
While the string DAC and thermometer DAC architectures are by far the simplest, they are certainly n...
This chapter presents a flexible DAC design in 40 nm CMOS technology. It features large scale functi...
This paper presents design methodology and comparison of a 1-bit DAC in both 180 nm and 90 nm CMOS t...
In arithmetic circuits for digital signal processing, radixes other than two are often used to make ...
The integration of digital and analog systems on single CMOS integrated circuits will continue to be...
This thesis studies the `smart' concept for application to analog-to-digital and digital-to-analog c...
This paper classifies correction methods for current-steering Digital-to-Analog Converters (DACs), w...
DOI
Add to ORKG