In this paper, we report on passive alignment with submicrometer accuracy of two photonic chips on a silicon optical bench. An effective design principle to minimize the tolerance chain is presented and applied to a case study. The chips have been successfully manufactured and an experimental setup has been made that can precisely assemble the chips and evaluate the alignment performance based on the camera images and coupling efficiency. It was demonstrated that passive alignment features defined in the waveguiding layers are robust enough to function as mechanical endstops. Subpixel image analysis of assembled chips showed that a 3s chip-to-chip repeatability better than 500 nm can be achieved. Finally, based on optical coupling measureme...
International audienceThis paper studies the self-alignment properties between two chips that are st...
International audienceThis paper studies the self-alignment properties between two chips that are st...
International audienceThis paper studies the self-alignment properties between two chips that are st...
In this paper, we report on passive alignment with submicrometer accuracy of two photonic chips on a...
In this paper, we report on passive alignment with submicrometer accuracy of two photonic chips on a...
In this paper, we report on passive alignment with submicrometer accuracy of two photonic chips on a...
In this paper, we report on passive alignment with submicrometer accuracy of two photonic chips on a...
In this paper, we report on passive alignment with submicrometer accuracy of two photonic chips on a...
Part 1: Micro Assembly Processes and SystemsInternational audienceIn this paper, we report on passiv...
The ever-growing demand for smaller microchip feature sizes and thus more powerful chips, has fuelle...
Passive alignment of photonic components is an assembly method compatible with a high production vol...
Precision and Microsystems EngineeringMechanical, Maritime and Materials Engineerin
In this paper, we present positionable photonic waveguide arrays that are developed for optical chip...
Passive alignment of photonic components is an assembly method compatible with a high production vol...
International audienceThis paper studies the self-alignment properties between two chips that are st...
International audienceThis paper studies the self-alignment properties between two chips that are st...
International audienceThis paper studies the self-alignment properties between two chips that are st...
International audienceThis paper studies the self-alignment properties between two chips that are st...
In this paper, we report on passive alignment with submicrometer accuracy of two photonic chips on a...
In this paper, we report on passive alignment with submicrometer accuracy of two photonic chips on a...
In this paper, we report on passive alignment with submicrometer accuracy of two photonic chips on a...
In this paper, we report on passive alignment with submicrometer accuracy of two photonic chips on a...
In this paper, we report on passive alignment with submicrometer accuracy of two photonic chips on a...
Part 1: Micro Assembly Processes and SystemsInternational audienceIn this paper, we report on passiv...
The ever-growing demand for smaller microchip feature sizes and thus more powerful chips, has fuelle...
Passive alignment of photonic components is an assembly method compatible with a high production vol...
Precision and Microsystems EngineeringMechanical, Maritime and Materials Engineerin
In this paper, we present positionable photonic waveguide arrays that are developed for optical chip...
Passive alignment of photonic components is an assembly method compatible with a high production vol...
International audienceThis paper studies the self-alignment properties between two chips that are st...
International audienceThis paper studies the self-alignment properties between two chips that are st...
International audienceThis paper studies the self-alignment properties between two chips that are st...
International audienceThis paper studies the self-alignment properties between two chips that are st...