Fully balanced 60 GHz LNA with 37% bandwidth, 3.8 dB NF, 10 dB gain and constant group delay over 6 GHz bandwith

This paper presents a two-stage fully integrated 60 GHz differential Low Noise Amplifier implemented in a TSMC bulk CMOS 65 nm technology. Implementation of a voltage-voltage feedback enables the neutralization of the Miller capacitance and the achievement of flat gain with a deviation of ± 0.25 dB over the entire 6 GHz bandwidth. It features a transducer gain (Gt) of 10 dB along with a noise figure (NF) of 3.8 dB, NFmin of 3.7 dB and a constant delay time. IIP3 is 4 dBm. It consumes 35 mW from a 1.2 V supply and only occupies 330 x 170 µm