The promise of chip-wide asynchronous operation is its potential for very low power consumption. This potential is demonstrated by an error-corrector based on digital compact cassette (DCC) specifications, dissipating 80% less than its synchronous counterpart. A reduction in power consumption means longer battery lifetime, important in portable products such as cellular radio and personal audio
Abstract—This brief presents an implementation of ultralow-power microcontrollers that use a separat...
Abstract—In this paper, a novel ultra-low-power digitally con-trolled oscillator (DCO) with cell-bas...
Abstract—In this paper, a novel ultra-low-power digitally con-trolled oscillator (DCO) with cell-bas...
The promise of chip-wide asynchronous operation is its potential for very low power consumption. Thi...
echniques are evaluated for implementing error- correction codes (ECC) in wireless applications with...
A new ADC architecture is devised. This architecture is memory based, in which the last sample is us...
ISBN 978-1-61284-208-0International audienceDrastic device shrinking, power supply reduction, increa...
The demand to integrate more features has significantly increased the complexity and power consumpti...
This thesis pertains to the design of a digital signal processor (DSP) with emphasis on lowpower for...
Viterbi decoders are used for decoding convolutional forward error correction codes [ 13 in a large ...
In baseband digital signal processing, dynamic voltage scaling is an effective method to reduce the ...
Digital down conversion (DDC) is an algorithm, used to lower the amount of samples per second by sel...
Low power consumption is the objective of electronic devices. And now, for many portable multimedia...
The wireless channel is a hostile environment. The transmitted signal does not only suffers multi-pa...
Current mobile phone applications demand high performance from the DSP, and future generations are l...
Abstract—This brief presents an implementation of ultralow-power microcontrollers that use a separat...
Abstract—In this paper, a novel ultra-low-power digitally con-trolled oscillator (DCO) with cell-bas...
Abstract—In this paper, a novel ultra-low-power digitally con-trolled oscillator (DCO) with cell-bas...
The promise of chip-wide asynchronous operation is its potential for very low power consumption. Thi...
echniques are evaluated for implementing error- correction codes (ECC) in wireless applications with...
A new ADC architecture is devised. This architecture is memory based, in which the last sample is us...
ISBN 978-1-61284-208-0International audienceDrastic device shrinking, power supply reduction, increa...
The demand to integrate more features has significantly increased the complexity and power consumpti...
This thesis pertains to the design of a digital signal processor (DSP) with emphasis on lowpower for...
Viterbi decoders are used for decoding convolutional forward error correction codes [ 13 in a large ...
In baseband digital signal processing, dynamic voltage scaling is an effective method to reduce the ...
Digital down conversion (DDC) is an algorithm, used to lower the amount of samples per second by sel...
Low power consumption is the objective of electronic devices. And now, for many portable multimedia...
The wireless channel is a hostile environment. The transmitted signal does not only suffers multi-pa...
Current mobile phone applications demand high performance from the DSP, and future generations are l...
Abstract—This brief presents an implementation of ultralow-power microcontrollers that use a separat...
Abstract—In this paper, a novel ultra-low-power digitally con-trolled oscillator (DCO) with cell-bas...
Abstract—In this paper, a novel ultra-low-power digitally con-trolled oscillator (DCO) with cell-bas...