Event-driven spiking neural networks using asynchronous-logic network-on-chip routers in field programmable gate array (FPGA)

With the continuous development of deep learning, the scientific community continues to propose new neural network architectures based on brain-inspired research. So far, the architecture of neural networks has changed over three generations. The neural network-Spiking Neural Network (SNN) has aroused great interest among researchers. Compared with the second-generation neural network, SNN uses spikes to process information. The neuronal units in SNNs are only active when they receive or emit spikes, so it is event-driven, thus making it energy-efficient. This dissertation investigates the low power dissipation characteristics of the SNN and proposes effective techniques to reduce the power dissipation of its operations. This dissertation is based on a realized small system-level SNN network architecture. We are trying to optimize the structure of the system with the help of Wave Dynamic Differential Logic. We found the computation unit of LIF neurons and rewrite their structure of them. And we successfully reduced 7.59% of the total power in critical computation units compared to single-rail circuits. The result proved that WDDL has great potential in lowering the power consumption of circuits.Master of Science (Green Electronics