A spurs reduction fractional-N frequency divider with a frequency range which is 3.5 times larger than that of a conventional fractional-N divider is presented in this paper. A 1.2-GHz quadrature voltage-controlled oscillator (VCO) is designed as the input source of the frequency divider. The circuit was fabricated using the 0.25-μm CMOS technology. The power consumption of the frequency divider and the quadrature VCO are 3 and 6 mW, respectively, at a 2-V supply.Published versio
CMOS regenerative frequency dividers, based on a fully balanced Gilbert cell, are analyzed in this p...
A 2:1 static frequency divider using a band-pass load was fabricated in a digital 90nm SOI CMOS tech...
The ever-increasing demand for global mobility and multimedia services drives wireless communication...
This paper presents the design of a fully integrated wide-band low phase noise quadrature LC-tank VC...
Abstract This paper describes the design and post-layout simulations of a 2/3/4- modulus frequency ...
Abstract—In this paper, a dual-band integer-N frequency divider is proposed for 2.4/5.2 GHz multi-st...
A programmable frequency divider for the use in a fractional-N frequency synthesizer is presented. T...
A low-voltage programmable frequency divider with wide input frequency range is fabricated in standa...
Frequency multiplication by 3/2 is proposed as a means to expand the frequency generation capabiliti...
The demand for wireless devices is increasing, new standards are constantly evolving and the operat...
The architecture of a high-speed low-power-consumption CMOS dual-modulus frequency divider is presen...
A fractional-N frequency synthesizer fabricated in a0.13μm CMOS technology is presented for the a...
Frequency multiplication by 3/2 is proposed as a means to expand the frequency generation capabiliti...
Frequency multiplication by 3/2 is proposed as a means to expand the frequency generation capabiliti...
Abstruct- The architecture of a high-speed low-power-consumption CMOS dual-modulus frequency divider...
CMOS regenerative frequency dividers, based on a fully balanced Gilbert cell, are analyzed in this p...
A 2:1 static frequency divider using a band-pass load was fabricated in a digital 90nm SOI CMOS tech...
The ever-increasing demand for global mobility and multimedia services drives wireless communication...
This paper presents the design of a fully integrated wide-band low phase noise quadrature LC-tank VC...
Abstract This paper describes the design and post-layout simulations of a 2/3/4- modulus frequency ...
Abstract—In this paper, a dual-band integer-N frequency divider is proposed for 2.4/5.2 GHz multi-st...
A programmable frequency divider for the use in a fractional-N frequency synthesizer is presented. T...
A low-voltage programmable frequency divider with wide input frequency range is fabricated in standa...
Frequency multiplication by 3/2 is proposed as a means to expand the frequency generation capabiliti...
The demand for wireless devices is increasing, new standards are constantly evolving and the operat...
The architecture of a high-speed low-power-consumption CMOS dual-modulus frequency divider is presen...
A fractional-N frequency synthesizer fabricated in a0.13μm CMOS technology is presented for the a...
Frequency multiplication by 3/2 is proposed as a means to expand the frequency generation capabiliti...
Frequency multiplication by 3/2 is proposed as a means to expand the frequency generation capabiliti...
Abstruct- The architecture of a high-speed low-power-consumption CMOS dual-modulus frequency divider...
CMOS regenerative frequency dividers, based on a fully balanced Gilbert cell, are analyzed in this p...
A 2:1 static frequency divider using a band-pass load was fabricated in a digital 90nm SOI CMOS tech...
The ever-increasing demand for global mobility and multimedia services drives wireless communication...