A very high slew-rate CMOS operational amplifier

We present a dynamic CMOS operational amplifier with a special input circuit which injects an extra bias current to increase the slew-rate, depending on the input signal. The performance of this operational amplifier is compared to a conventional operational amplifier when used in a sample andhold circuit. The maximum operating clock frequency of the sample andhold circuit increases from 290 kHz up to 1 MHz with a hold-capacitor of 1 nF. The amplifier has been fabricated in a 5 mym CMOS process and dissipates a static power of 7.5 mW. In this contribution we present a very-high-slew-rate CMOS operational amplifier. It uses a circuit to inject an extra bias current into a conventional source coupled CMOS differential input signals. This measure substantially increases the slew rate of an operational amplifier for a given quiescent current. We compare the performance of this operational amplifier to a conventional operational amplifier when used in a sample-and-hold circuit. The maximum operating clock frequency of the sample-and-hold increases from 290 kHz to 1 MHz with a hold capacitor of 1 nF. The amplifier has been fabricated in a 5-Mym CMOS process and dissipates a static power of 7.5mW