Two static and two dynamic frequency dividers based on enhancement and depletion 0.2-mu m gate length AlGaAs/GaAs-high electron mobility transistor (HEMT) (integral of T = 60 and 55 GHz) technology were designed and fabricated. High-speed operations up to 35 GHz for the static frequency dividers and 48 GHz for the dynamic dividers, respectively, have been achieved. The single-ended input and differential outputs to ground simplify many applications. The power consumption is 250 mW for the divide-by-two dividers and 350 mW for the. divide-by-four dividers using two supply voltages of 4 and - 2.5 V
Abstract—Static frequency dividers are widely used technology performance benchmark circuits. Using ...
The design and characterization of two regenerative frequency dividers based on a commercial foundry...
The architecture of a high-speed low-power-consumption CMOS dual-modulus frequency divider is presen...
A divide-by-two dynamic frequency divider based on enhancement and depletion 0.2 mu m gate length ps...
A static frequency divider with a maximum operating frequency of up to 66 GHz was developed for appl...
The design and performance of a dynamic divider by four based on a 100 nm metamorphic enhancement HE...
A frequency devider based on AlGaAs/GaAs/AlGaAs quantum well FETs with 0.2 micrometer gate length ha...
The design and performance of a 28 - 51 GHz dynamic frequency divider based on pseudomorphic Alsub0....
The design and performance of a dynamic frequency divider was presented. This digital IC demonstrate...
A 14GHz static frequency divider has been fabricated using an enhancemcnt/depletion 0.3 mym recessed...
A data decision and a static frequency divider in source coupled FET logic with a supply voltage of ...
In this paper, the authors present a fully integrated frequency divider with a divide ratio of 32, u...
Based on a 100 nm metamorphic HEMT process with 220 GHz transit frequency fT an optimised dynamic 2:...
Design of a digital dynamic divider in SiGe bipolar technology is presented in this paper. The propo...
A 16 x 16 bit parallel multiplier based on a 26 k sea-of-gate has been fabricated successfully to de...
Abstract—Static frequency dividers are widely used technology performance benchmark circuits. Using ...
The design and characterization of two regenerative frequency dividers based on a commercial foundry...
The architecture of a high-speed low-power-consumption CMOS dual-modulus frequency divider is presen...
A divide-by-two dynamic frequency divider based on enhancement and depletion 0.2 mu m gate length ps...
A static frequency divider with a maximum operating frequency of up to 66 GHz was developed for appl...
The design and performance of a dynamic divider by four based on a 100 nm metamorphic enhancement HE...
A frequency devider based on AlGaAs/GaAs/AlGaAs quantum well FETs with 0.2 micrometer gate length ha...
The design and performance of a 28 - 51 GHz dynamic frequency divider based on pseudomorphic Alsub0....
The design and performance of a dynamic frequency divider was presented. This digital IC demonstrate...
A 14GHz static frequency divider has been fabricated using an enhancemcnt/depletion 0.3 mym recessed...
A data decision and a static frequency divider in source coupled FET logic with a supply voltage of ...
In this paper, the authors present a fully integrated frequency divider with a divide ratio of 32, u...
Based on a 100 nm metamorphic HEMT process with 220 GHz transit frequency fT an optimised dynamic 2:...
Design of a digital dynamic divider in SiGe bipolar technology is presented in this paper. The propo...
A 16 x 16 bit parallel multiplier based on a 26 k sea-of-gate has been fabricated successfully to de...
Abstract—Static frequency dividers are widely used technology performance benchmark circuits. Using ...
The design and characterization of two regenerative frequency dividers based on a commercial foundry...
The architecture of a high-speed low-power-consumption CMOS dual-modulus frequency divider is presen...