Finite-Elemente-Analyse von modernen Leitbahnsystemen

The development of microelectronics in the last decades is characterized by a continuous decline of feature sizes. This downscaling of dimensions and the simultaneous increase of circuit complexity would strongly increase the RC delay if no counter measures are taken. Therefore, copper lines are replacing aluminum lines in modern interconnect systems. For the same reason, SiO2 is more and more replaced by low-k dielectrics. In the present work, the influence of different low-k dielectrics on the lifetime of Al and Cu lines is examined. An S-shaped test structure, used by Infineon for lifetime tests, serves as an example. The investigations are carried out by means of Finite Element Analysis. The S-shaped test structure is modelled in three dimensions using SiO2 and several low-k dielectrics and analysed in closed form with respect to the influence of electromigration, thermomigration, and stress migration on mass flow, mass flow divergence, and the lifetime. The impact of the most important geometrical and electrical parameters (such as line width, interconnect position, influence of additional current-less lines, and comparison of operating conditions with test conditions) is developed. The simulation data are in good accordance with experimental results. A comparison of different technologies shows that the interconnect lifetime is appreciably diminished by the use of low-k dielectrics. However, this can be partially compensated by a hybrid architecture without loosing to much of the low-k dielectrics' electrical advantage