This paper presents the development of a 10 bit very low-power CMOS SAR-ADC to be used in medical implants. The first part discusses the principle schematic and the requirements for component matching and the comparator of the ADC. Additionally, the measurement results of a fabricated test chip will be given. The second part of this paper discusses the possibility of direct on-chip implementation of a capacitive pressure sensor in a switched-capacitor SAR-ADC
This paper presents a 10-bit 1 kS/s SAR ADC in 0.13 mu m CMOS technology for ECG signal recording ap...
Design of a low power Successive Approximation Register Analog to Digital Converter (SAR ADC) in 45n...
In recent years, there has been a growing need for Successive Approximation Register (SAR) Analog-to...
In this paper a low power consuming 10 bit SAR ADC which is suitable for Biomedical applications is ...
This paper presents a 9-bit differential, minimum-powered, successive approximation register (SAR) A...
Low-power analog-to-digital converter (ADC) is a crucial part of wearable or implantable bioelectron...
In this work a low power SAR ADC with 8.9 ENOB for wireless communication systems is presented. A ca...
Power consumption is one of the main design constraints in today’s integrated circuits. For systems ...
In wireless implantable systems (WIS) low power consumption and linearity are the most prominent per...
This work presents an ultra-low power 10-bit, 1-KS/s successive approximation register (SAR) analog-...
This paper presents the development of a 38.5 kS/s 10-bit low power SAR ADC which is realized in MIM...
An analog-to-digital converter (ADC) with a medium sampling rate (a few MS/s to a few tens of MS/s) ...
This paper presents a 10-bit successive approximation register analog-to-digital converter with ener...
An 11-bit 10 MS/s successive approximation register (SAR) analog-to-digital converter (ADC) is propo...
In the early phase of MEMS development piezoresistive pressure transducers were dominating due to th...
This paper presents a 10-bit 1 kS/s SAR ADC in 0.13 mu m CMOS technology for ECG signal recording ap...
Design of a low power Successive Approximation Register Analog to Digital Converter (SAR ADC) in 45n...
In recent years, there has been a growing need for Successive Approximation Register (SAR) Analog-to...
In this paper a low power consuming 10 bit SAR ADC which is suitable for Biomedical applications is ...
This paper presents a 9-bit differential, minimum-powered, successive approximation register (SAR) A...
Low-power analog-to-digital converter (ADC) is a crucial part of wearable or implantable bioelectron...
In this work a low power SAR ADC with 8.9 ENOB for wireless communication systems is presented. A ca...
Power consumption is one of the main design constraints in today’s integrated circuits. For systems ...
In wireless implantable systems (WIS) low power consumption and linearity are the most prominent per...
This work presents an ultra-low power 10-bit, 1-KS/s successive approximation register (SAR) analog-...
This paper presents the development of a 38.5 kS/s 10-bit low power SAR ADC which is realized in MIM...
An analog-to-digital converter (ADC) with a medium sampling rate (a few MS/s to a few tens of MS/s) ...
This paper presents a 10-bit successive approximation register analog-to-digital converter with ener...
An 11-bit 10 MS/s successive approximation register (SAR) analog-to-digital converter (ADC) is propo...
In the early phase of MEMS development piezoresistive pressure transducers were dominating due to th...
This paper presents a 10-bit 1 kS/s SAR ADC in 0.13 mu m CMOS technology for ECG signal recording ap...
Design of a low power Successive Approximation Register Analog to Digital Converter (SAR ADC) in 45n...
In recent years, there has been a growing need for Successive Approximation Register (SAR) Analog-to...