Verfahren zur Erhoehung der Speicherhaltezeit von haftstellenbasierten nichtfluechtigen Halbleiterspeicherzellen

DE 102010024861 A1 UPAB: 20110527 NOVELTY - The method involves adjusting charge-trapping based non-volatile semiconductor memory cells for implementing a storing process with programming pulses (9) of polarity on cut-off voltage. Voltage pulses are supplied to the memory cells. The cut-off voltage is selected such that the voltage lies above desired target cut-off voltage for the memory cells. The voltage pulses connected to verification pulses (10) are adjusted such that the voltage pulses reduce the cut-off voltage of the memory cells approximately to the target cut-off voltage. DETAILED DESCRIPTION - An INDEPENDENT CLAIM is also included for a device for operating charge-trapping based-non volatile semiconductor memory cells. USE - Method for increasing non-volatile NAND flash memory holding time during operation of charge-trapping based non-volatile semiconductor memory cells. ADVANTAGE - The voltage pulses connected to the verification pulse are adjusted such that the voltage pulses reduce the cut-off voltage of the memory cells approximately to the target cut-off voltage, thus reducing long-term charge loss and shifting the associated cut-off voltage, and hence increasing non-volatile NAND flash memory holding time during operation of the memory cells