Lead-free reflow soldering techniques applying AuSn as well as SnAg electroplated bumps were chosen for the evaluation of the flip-chip-bonding process for X-ray pixel detectors. Both solders can be used in pick-and-place processes with a subsequent batch reflow suitable for high-volume production. AuSn solder was selected because of its fluxless bondability, good wettability, and self-alignment process capability, and SnAg solder was chosen for its more ductile behavior and lower yield stress compared to AuSn. GaAs test chips with daisy chain and four-point Kelvin probe structures together with appropriate Si test substrates were designed, manufactured, and bumped. Test chips with 55 and 170 mu m pitch and different chip sizes (maximum 16....
Miniaturization enforcement of electronic modules in complex as well as low end applications is the ...
A packaging process for flip-chip LEDs (light emitting diodes) is described. The LEDs are picked and...
In 3D IC, μ-bumps and through silicon vias (TSVs) have been developed to achieve the vertical stacki...
Flip chip assembly experiments using small electroplated Au/Sn bumps, i.e. bumps of 50 µm in diamete...
The BTeV hybrid pixel detector is constructed of readout chips and sensor arrays which are developed...
In contemporary high energy physics experiments, silicon detectors are essential for recording the t...
This paper presents a flip chip technique based on electroless Ni-Au bumping and stencil printing of...
Pixel detectors proposed for the new generation of hadron collider experiments will use bump-bonding...
Flip chip assembly on flexible organic substrates is facing increasing interest. In consumer product...
The fine-pitch electroplating-based solder bump fabrication process has been developed. The effect o...
Single chip handling has received significant attention for the diced chip without an Under Bump Met...
AuSn is a special purpose interconnect material with advantages concerning its high temperature resi...
With the increased awareness of the lead free solder in the electronic packaging industry, the devel...
The application of AuSn solder processes to achieve high after bonding accuracy for optoelectronic m...
The design and proper selection of low-cost printed circuit board (PCB) is essential to the reliabil...
Miniaturization enforcement of electronic modules in complex as well as low end applications is the ...
A packaging process for flip-chip LEDs (light emitting diodes) is described. The LEDs are picked and...
In 3D IC, μ-bumps and through silicon vias (TSVs) have been developed to achieve the vertical stacki...
Flip chip assembly experiments using small electroplated Au/Sn bumps, i.e. bumps of 50 µm in diamete...
The BTeV hybrid pixel detector is constructed of readout chips and sensor arrays which are developed...
In contemporary high energy physics experiments, silicon detectors are essential for recording the t...
This paper presents a flip chip technique based on electroless Ni-Au bumping and stencil printing of...
Pixel detectors proposed for the new generation of hadron collider experiments will use bump-bonding...
Flip chip assembly on flexible organic substrates is facing increasing interest. In consumer product...
The fine-pitch electroplating-based solder bump fabrication process has been developed. The effect o...
Single chip handling has received significant attention for the diced chip without an Under Bump Met...
AuSn is a special purpose interconnect material with advantages concerning its high temperature resi...
With the increased awareness of the lead free solder in the electronic packaging industry, the devel...
The application of AuSn solder processes to achieve high after bonding accuracy for optoelectronic m...
The design and proper selection of low-cost printed circuit board (PCB) is essential to the reliabil...
Miniaturization enforcement of electronic modules in complex as well as low end applications is the ...
A packaging process for flip-chip LEDs (light emitting diodes) is described. The LEDs are picked and...
In 3D IC, μ-bumps and through silicon vias (TSVs) have been developed to achieve the vertical stacki...