In this paper the residual stress in single-crystalline Si around W-filled TSVs was determined experimentally by three methods with high spatial resolution and compared to one another. In contrast to Cu as TSV filler, W has the potential advantage of a lower CTE mismatch to Si resulting in lower thermally induced stress at the TSV-interface. As test layout a cross-sectioned double-die stack was used consisting of a top die with TSVs which is bonded by Cu-Sn Solid Liquid Interdiffusion Bonding (SLID) to the bottom die. Three different experimental methods have been used to determine mechanical stresses in silicon nearby tungsten TSVs - HR-XRD performed at a synchrotron beamline, microRaman spectroscopy and stress relief techniques put into e...
AbstractOne of the key enablers for the successful integration of 3-D interconnects using the Throug...
Thermomechanical stress in microelectronics packaging systems is a very complex phenomenon. Understa...
International audienceThrough-Silicon-Vias (TSV) are the key to 3D integrated microsystems. Their fa...
Three different experimental methods have been used to determine mechanical stresses in silicon near...
textThree-dimensional (3-D) integration as an effective method to overcome the wiring limit imposed ...
Three-dimensional (3D) micro-Raman spectroscopy mapping of mechanical stress induced by Cu through-S...
International audienceThe performance of three-dimensional integrated circuits is decisively influen...
The level of stress in silicon as a result of applying Cu-Sn SLID wafer level bonding to hermeticall...
Three-dimensional (3-D) integration has emerged as an effective solution to overcome the wiring limi...
Thermo-mechanical reliability of through-silicon via (TSV) structures is affected by the residual st...
Due to assembly processes in microelectronics packaging, semiconductor materials are under undesired...
In this paper, a Micro-Infrared Photo-elasticity (MIPE) system was set up and applied to evaluate th...
In this paper thermo-mechanical stresses generated by TSV annealing are the center of interest. For ...
Micromachining can result in residual stress in a wafer. This paper puts forward an online measuring...
Abstract—X-ray microbeam diffraction measurements were conducted for copper (Cu) through-silicon via...
AbstractOne of the key enablers for the successful integration of 3-D interconnects using the Throug...
Thermomechanical stress in microelectronics packaging systems is a very complex phenomenon. Understa...
International audienceThrough-Silicon-Vias (TSV) are the key to 3D integrated microsystems. Their fa...
Three different experimental methods have been used to determine mechanical stresses in silicon near...
textThree-dimensional (3-D) integration as an effective method to overcome the wiring limit imposed ...
Three-dimensional (3D) micro-Raman spectroscopy mapping of mechanical stress induced by Cu through-S...
International audienceThe performance of three-dimensional integrated circuits is decisively influen...
The level of stress in silicon as a result of applying Cu-Sn SLID wafer level bonding to hermeticall...
Three-dimensional (3-D) integration has emerged as an effective solution to overcome the wiring limi...
Thermo-mechanical reliability of through-silicon via (TSV) structures is affected by the residual st...
Due to assembly processes in microelectronics packaging, semiconductor materials are under undesired...
In this paper, a Micro-Infrared Photo-elasticity (MIPE) system was set up and applied to evaluate th...
In this paper thermo-mechanical stresses generated by TSV annealing are the center of interest. For ...
Micromachining can result in residual stress in a wafer. This paper puts forward an online measuring...
Abstract—X-ray microbeam diffraction measurements were conducted for copper (Cu) through-silicon via...
AbstractOne of the key enablers for the successful integration of 3-D interconnects using the Throug...
Thermomechanical stress in microelectronics packaging systems is a very complex phenomenon. Understa...
International audienceThrough-Silicon-Vias (TSV) are the key to 3D integrated microsystems. Their fa...