On -chip current and power measurement techniques for integrated circuits with regulated power

On-chip current and power measurement techniques are challenged by the performance degradation imposed on system itself as well as the increasing design complexity. A new on-chip current and power measurement technique is proposed in this dissertation. This technique is based on utilizing the pervasive on-chip voltage regulators. We demonstrate that current and power information can be directly obtained from the power source, typically in the form of a voltage regulator. This technique has the advantage of minimizing the impact on system\u27s design and performance. The proposed on-chip current and power measurement technique reuses the existing low-dropout voltage regulator (LDO) and obtain on-chip current and power information from LDO\u27s internal signal. Current and power information is directly obtained from the power source, typically in the form of a voltage regulator. Due to the unique structure, current or power sensors do not have physical connection with system\u27s function units. Therefore, this technique is expected to have minimum impact on system\u27s performance and design complexity. Power management techniques need the capability to continuous monitor the power consumption, preferably on-chip. The proposed technique can be used to provide continuous power information. This technique is investigated by testing ISCAS85 benchmark circuits. Using this technique, on-chip power sensors were designed and verified to have good linearity and accuracy. Experiment results show that the average non-linearity is about 0.4% and the average error is between 0.2% to 1.2%. This technique cause very negligible performance degradation of about 1.7%. It has the advantage of providing continuous on-chip power information with negligible performance penalty