In this dissertation, we develop and analyze algorithms for scheduling in input-buffered switch fabrics. We have introduced new deterministic and randomized scheduling algorithms that are capable of rate provisioning, achieves 100% throughput and have lower complexity than other proposed solutions. We consider QoS provisioning in general and rate provisioning in particular as the basic requirements for the next generation switch fabrics. To do rate provisioning, we extend the concept of packetized tracking policies for fluid policies to the input-buffered switches. It is considered that the speed up of the switch is one and the fluid policy is feasible, i.e., utilization of all ports is less than one. For the 2x2 switches, we show ...
Abstract — The input-queued switch architecture is widely used in Internet routers, due to its abili...
The virtual output queued (VOQ) switching architecture was adopted for high speed switch implementat...
Packet switching fabrics constitute a fundamental building block of all Internet routers. As a core ...
Output-queued switching, though is able to offer high throughput, guaranteed delay and fairness, lac...
In this paper, we use fluid model techniques to establish new results for the throughput of input-bu...
This dissertation deals with the design of scheduling algorithms for high-speed switches. The analys...
Telecommunication Systems, 34(1-2): pp. 37-49.This paper presents a class of algorithms for scheduli...
An input-queued switch with virtual output queuing is able to provide a maximum throughput of 100 % ...
The delay and throughput characteristics of a packet switch depend mainly on the queuei...
Input Queued(IQ) switches have been very well studied in the recent past. The main problem in the IQ...
Combined input and output queuing (CIOQ) switches are being considered as high-performance switch ar...
Includes bibliographical references.In this dissenation, the candidate proposes the use of a ratio t...
Single-stage input-queued (IQ) switches are attractive for implementation of high performance router...
The delay and throughput characteristics of a packet switch de-pend mainly on the queueing scheme an...
This paper considers the problem of packet-mode scheduling of input queued switches. Packets have va...
Abstract — The input-queued switch architecture is widely used in Internet routers, due to its abili...
The virtual output queued (VOQ) switching architecture was adopted for high speed switch implementat...
Packet switching fabrics constitute a fundamental building block of all Internet routers. As a core ...
Output-queued switching, though is able to offer high throughput, guaranteed delay and fairness, lac...
In this paper, we use fluid model techniques to establish new results for the throughput of input-bu...
This dissertation deals with the design of scheduling algorithms for high-speed switches. The analys...
Telecommunication Systems, 34(1-2): pp. 37-49.This paper presents a class of algorithms for scheduli...
An input-queued switch with virtual output queuing is able to provide a maximum throughput of 100 % ...
The delay and throughput characteristics of a packet switch depend mainly on the queuei...
Input Queued(IQ) switches have been very well studied in the recent past. The main problem in the IQ...
Combined input and output queuing (CIOQ) switches are being considered as high-performance switch ar...
Includes bibliographical references.In this dissenation, the candidate proposes the use of a ratio t...
Single-stage input-queued (IQ) switches are attractive for implementation of high performance router...
The delay and throughput characteristics of a packet switch de-pend mainly on the queueing scheme an...
This paper considers the problem of packet-mode scheduling of input queued switches. Packets have va...
Abstract — The input-queued switch architecture is widely used in Internet routers, due to its abili...
The virtual output queued (VOQ) switching architecture was adopted for high speed switch implementat...
Packet switching fabrics constitute a fundamental building block of all Internet routers. As a core ...