Low temperature (Zn,Sn)O deposition for reducing interface open-circuit voltage deficit to achieve highly efficient Se-free Cu(In,Ga)S2 solar cells

Cu(In,Ga)S-2 holds the potential to become a prime candidate for use as the top cell in tandem solar cells owing to its tunable bandgap from 1.55 eV (CuInS2) to 2.50 eV (CuGaS2) and favorable electronic properties. Devices above 14% power conversion efficiency (PCE) can be achieved by replacing the CdS buffer layer with a (Zn,Mg)O or Zn(O,S) buffer layer. However, the maximum achievable PCE of these devices is limited by the necessary high heating temperatures during or after buffer deposition, as this leads to a drop in the quasi-Fermi level splitting (qFLs) and therefore the maximum achievable open-circuit voltage (V-OC). In this work, a low-temperature atomic layer deposited (Zn,Sn)O thin film is explored as a buffer layer to mitigate the drop in the qFLs. The devices made with (Zn,Sn)O buffer layers are characterized by calibrated photoluminescence and current-voltage measurements to analyze the optoelectronic and electrical characteristics. An improvement in the qFLs after buffer deposition is observed for devices prepared with the (Zn,Sn)O buffer deposited at 120 degrees C. Consequently, a device with a V-OC value above 1 V was achieved. A 14% PCE is externally measured and certified for the best solar cell. The results show the necessity of developing a low-temperature buffer deposition process to maintain and translate absorber qFLs to device V-OC