The Networks-on-Chip paradigm has been seen as an interconnect architecture solution for complex systems. However, performance and energy issues still represent limiting factors for Multi-Processors System-on-Chip. Moreover, the execution of different applications requires flexible and transparent interconnection solutions, and this feature is best provided by a selfadaptable system. In this paper we propose HASIN, an architecture that explores the suitable switching architecture according to the traffic in each region of the system, in a hierarchical manner. The proposed interconnection allows adapting the network at runtime using three switching possibilities to reconfigure itself according to the floorplan information. HASIN allows incre...
This paper proposes a Network-on-Chip architecture that offers high flexibility and performance. It ...
Networks on Chip presents a variety of topics, problems and approaches with the common theme to syst...
A Network-on-Chip (NoC) is used instead of buses to provide better interconnection between the IP mo...
The Networks-on-Chip paradigm has been seen as an interconnect architecture solution for complex sys...
Abstract-Networks-on-chip has been seen as an interconnect solution for complex systems. However, pe...
We propose a packet switched platform for single chip systems which scales well to an arbitrary numb...
Application-specific network-centric architectures (such as Networks on-Chip, NoCs) have recently be...
This paper describes the architecture of our dynamically reconfigurable Network-on-Chip (NoC) archit...
Networks-on-Chip (NoC) is recently proposed as an alternative to the on-chip bus to meet the increas...
Application-specific network-centric architectures (such as Networks on-Chip, NoCs) have recently be...
Systems on chip (SoC) are becoming increasingly complex, with a large number of applications integra...
A core mapping method for reconfigurable network-on-chip (NoC) architectures is presented in this pa...
Network-on-chip (NoC) has been proposed to solve the scalability problem experienced in bus-based sy...
AbstractThe layout density of integrated circuits on a single chip has led to the reduced size at su...
This paper proposes a Network-on-Chip architecture that offers high flexibility and performance. It ...
Networks on Chip presents a variety of topics, problems and approaches with the common theme to syst...
A Network-on-Chip (NoC) is used instead of buses to provide better interconnection between the IP mo...
The Networks-on-Chip paradigm has been seen as an interconnect architecture solution for complex sys...
Abstract-Networks-on-chip has been seen as an interconnect solution for complex systems. However, pe...
We propose a packet switched platform for single chip systems which scales well to an arbitrary numb...
Application-specific network-centric architectures (such as Networks on-Chip, NoCs) have recently be...
This paper describes the architecture of our dynamically reconfigurable Network-on-Chip (NoC) archit...
Networks-on-Chip (NoC) is recently proposed as an alternative to the on-chip bus to meet the increas...
Application-specific network-centric architectures (such as Networks on-Chip, NoCs) have recently be...
Systems on chip (SoC) are becoming increasingly complex, with a large number of applications integra...
A core mapping method for reconfigurable network-on-chip (NoC) architectures is presented in this pa...
Network-on-chip (NoC) has been proposed to solve the scalability problem experienced in bus-based sy...
AbstractThe layout density of integrated circuits on a single chip has led to the reduced size at su...
This paper proposes a Network-on-Chip architecture that offers high flexibility and performance. It ...
Networks on Chip presents a variety of topics, problems and approaches with the common theme to syst...
A Network-on-Chip (NoC) is used instead of buses to provide better interconnection between the IP mo...