A fast remotely operable digital twin of a generic electric powertrain for geographically distributed hardware-in-the-loop simulation testbed

The automotive industry today is seeing far-reaching and portentous changes that will change the face of it in the foreseeable future. Digitalisation and Electrification are two of the key megatrends that is changing the way vehicles are developed and produced. A recent development in R&D process is the Hardware-in-the-Loop (HIL) method that uses a hybrid approach of testing a physical prototype immersed in a virtual environment, which is nowadays being creatively re-applied towards geographically separated multi-centre testing strategies, that suits the horizontally integrated and supply-chain driven industry very well. Geographical separation entails the deployment of a “Digital Twin” in remote centre(s) participating in multi-centre testing. This PhD aims to produce a highly robust, efficient, and rapidly computable Digital Twin of a generic electric powertrain using the multi-frequency averaging (MFA) technique that has been extended for variable frequency operation. This PhD also aims to commission a local HIL simulation testbed for a generic electric power inverter testing. The greater goal is to co-simulate the local HIL centre testing a prototype inverter, and its Digital Twin in a different location “twinning” the prototype inverter as best as possible. A novel approach for the Digital Twin has been proposed that employs Dynamic Phasors to solve the system in the frequency domain. An original method of multiplication of two signals in the frequency domain has been proposed. The resultant model has been verified against an equivalent time domain switching model and shown to outperform appreciably. A distinctive advantage the MFA Digital Twin offers is the “fidelity customisability”; based on application, the Twin can be set to compute a low (or high)-fi model at different computational cost. Finally, a novel method of communicating high-speed motor shaft position information using a low-speed processing system has been developed and validated. This has been applied to run real-life HIL simulation cycles on a test inverter and effects studied. The two ends of a multi-HIL testbed, i.e., local HIL environment for an inverter, and its Digital Twin, has been developed and validated. The last piece of the puzzle, i.e., employing a State Convergence algorithm to ensure the Digital Twin is accurate duplicating the performance of its “master”, is required to close the loop. Several ideas and process plans have been proposed to do the same