Partitioning of Hw-Sw Embedded Systems: A Metrics-Based Approach

The \pervasiveness" of silicon is going to enable the realization of all-on-a-chip systems for a wide range of embedded applications such as automotive, process control and telecom. The maturity of the digital synthesis CAD environments is shifting the designer's attention towards problems more related to a system-level tradeo analysis than in the past. However, common time-to-market constraints are forcing the CAD methodologies to provide quality/cost evaluation gures early in the design process, possibly in the valuable form of prediction. The goal is to dramatically reduce the number of complete synthesis cycles to achieve the optimal nal product. The aim of this paper is to dene some evaluation metrics to predict the characteristics of the nal implementation, tailored for control-dominated hardware{software embedded systems, and to show their application in a complete example. The relevant features considered by the presented analysis cover the modularization of the system specication, the power consumption for both hardware and software, the silicon area of the hardware part and the memory size of the software components. The use of these estimation metrics within a co-design environment, called TOSCA, is also presented through an illustrative example