In this paper we discuss the development of two emulation platforms for transactional memory systems on a single Field Programmable Gate Array (FPGA). We introduce two systems, integrating only off-the-shelf components, that respectively use a centralized and a distributed approach, presenting their hardware and software design. We analyze and compare these two architectures to a lock based multiprocessor prototype, discussing the trade-offs in terms of design complexity, performance and scalability
Abstract. In this paper, we take a MIPS-based open-source uniproces-sor soft core, Plasma, and exten...
Transactional memory is a promising technique for multithreaded synchronization and con-currency whi...
This paper demonstrates a new hardware/software co-simulation method that performs execution-driven ...
In this paper we discuss the development of two emulation platforms for transactional memory systems...
In this paper we present a rapid prototyping platform on a single Field Programmable Gate Array (FPG...
With the performance of single-core processors approaching its limits, an increased amount of resear...
This thesis attempts to bring together two recent topics by presenting a flexible Transactional Memo...
This thesis attempts to bring together two recent topics by presenting a flexible Transactional Memo...
With the performance of single-core processors approaching its limits, an increased amount of resear...
In the the last decades several performance walls were hit. The memory wall and the power wall are l...
Recent advances in Field-Programmable Gate Arrays (FPGA) and programmable interconnects have made it...
ISBN 978-1-4244-4574-5International audienceThe evolution of the consumer electronic devices leads t...
The complexity of today’s embedded applications requires mod-ern high-performance embedded System-on...
In this paper, we take a MIPS-based open-source uniprocessor soft core, Plasma, and extend it to obt...
This paper presents a framework to design a shared memory multiprocessor on a programmable platform....
Abstract. In this paper, we take a MIPS-based open-source uniproces-sor soft core, Plasma, and exten...
Transactional memory is a promising technique for multithreaded synchronization and con-currency whi...
This paper demonstrates a new hardware/software co-simulation method that performs execution-driven ...
In this paper we discuss the development of two emulation platforms for transactional memory systems...
In this paper we present a rapid prototyping platform on a single Field Programmable Gate Array (FPG...
With the performance of single-core processors approaching its limits, an increased amount of resear...
This thesis attempts to bring together two recent topics by presenting a flexible Transactional Memo...
This thesis attempts to bring together two recent topics by presenting a flexible Transactional Memo...
With the performance of single-core processors approaching its limits, an increased amount of resear...
In the the last decades several performance walls were hit. The memory wall and the power wall are l...
Recent advances in Field-Programmable Gate Arrays (FPGA) and programmable interconnects have made it...
ISBN 978-1-4244-4574-5International audienceThe evolution of the consumer electronic devices leads t...
The complexity of today’s embedded applications requires mod-ern high-performance embedded System-on...
In this paper, we take a MIPS-based open-source uniprocessor soft core, Plasma, and extend it to obt...
This paper presents a framework to design a shared memory multiprocessor on a programmable platform....
Abstract. In this paper, we take a MIPS-based open-source uniproces-sor soft core, Plasma, and exten...
Transactional memory is a promising technique for multithreaded synchronization and con-currency whi...
This paper demonstrates a new hardware/software co-simulation method that performs execution-driven ...