Electrical characterization of CMOS transistors subject to externally applied mechanical stress

Hole and electron mobilities in CMOS structures are significantly influenced by a mechanical strain state. In the present work a new experimental device has been designed, able to apply a uniaxial in-plane strain along different crystallographic orientations. A hole mobility enhancement of +10% and an electron mobility decrease of -5% have been demonstrated with the application of a 0.05% compressive strain; a hole mobility enhancement of +2% and an electron mobility decrease of -3% have been induced into the material with the application of a 0.05% compressive strain