In this paper, we present an efficient technique to perform design space exploration of a multi-processor platform that minimizes the number of simulations needed to identify the power-performance approximate Pareto curve. Instead of using semi-random search algorithms (like simulated annealing, tabu search, genetic algorithms, etc.), we use domain knowledge derived from the platform architecture to set-up exploration as a decision problem. Each action in the decision-theoretic framework corresponds to a change in the platform parameters. Simulation is performed only when information about the probability of action outcomes becomes insufficient for a decision. The algorithm has been tested with two multi-media industrial applications, namel...
Abstract1- This paper presents an efficient design exploration environment for high-end core process...
Given the increasing complexity of multi-processor systems-on-chip, a wide range of parameters must ...
Given the increasing complexity of Chip Multi-Processors (CMPs), a wide range of architecture parame...
In this paper, we present an efficient technique to perform design space exploration of a multi-proc...
In this paper, we present an efficient technique to perform design space exploration of a multi-proc...
This paper presents an efficient technique to perform design space exploration of a multiprocessor p...
Abstract—Multi-processor Systems-on-chip are currently de-signed by using platform-based synthesis t...
Multi-processor Systems-on-chip are currently designed by using platform-based synthesis techniques....
This chapter presents guidelines to choose an appropriate exploration algorithm, based on the proper...
As multi-core processor architectures with tens or even hundreds of cores, not all of them necessari...
Multi-processor Systems-on-chip are currently designed by using platform-based synthesis techniques....
The need for application specific design of multicore/manycore processing platforms is evident with ...
Abstract1- This paper presents an efficient design exploration environment for high-end core process...
Given the increasing complexity of multi-processor systems-on-chip, a wide range of parameters must ...
Given the increasing complexity of Chip Multi-Processors (CMPs), a wide range of architecture parame...
In this paper, we present an efficient technique to perform design space exploration of a multi-proc...
In this paper, we present an efficient technique to perform design space exploration of a multi-proc...
This paper presents an efficient technique to perform design space exploration of a multiprocessor p...
Abstract—Multi-processor Systems-on-chip are currently de-signed by using platform-based synthesis t...
Multi-processor Systems-on-chip are currently designed by using platform-based synthesis techniques....
This chapter presents guidelines to choose an appropriate exploration algorithm, based on the proper...
As multi-core processor architectures with tens or even hundreds of cores, not all of them necessari...
Multi-processor Systems-on-chip are currently designed by using platform-based synthesis techniques....
The need for application specific design of multicore/manycore processing platforms is evident with ...
Abstract1- This paper presents an efficient design exploration environment for high-end core process...
Given the increasing complexity of multi-processor systems-on-chip, a wide range of parameters must ...
Given the increasing complexity of Chip Multi-Processors (CMPs), a wide range of architecture parame...