Fully Digital Second-order Level-crossing Sampling ADC for Data Saving in Sensing Sparse Signals

This paper presents a fully integrated second-order level-crossing sampling data converter for sensing sparse signals with real-time detection of turning points. Compared with con- ventional level-crossing sampling ADCs which sample at fixed voltage levels, the proposed circuits update tracking thresholds using linear prediction, which forms sloped sampling levels. The prediction and calculation are done digitally by modifying the digital control logic of a conventional SAR ADC. The system sepa- rates the sampling and quantization processes and only selects the turning points in the input waveform for quantization. The output of the proposed data converter consists of both the quantized amplitudes of the selected sampling points and the timestamps between the selected sampling points. The main advantages of the proposed circuits are data savings and power savings for the following digital signal processing or communication circuits. The test chip was fabricated using a 180nm CMOS process. When sensing sparse signals such as ECG signals, the proposed ADC saves 30% compared to a conventional SAR ADC with an equal quantizer resolution and achieves a compression factor of 6.17.