Limits and application of the newly proposed deep-depletion SOI LDMOS

The behaviour of a deep depletion (DD) silicon on insulator (SOI) lateral MOS (LDMOS) is analysed. DD of the substrate for an SOI device has been recently proposed as an innovative technique to design power devices featuring a transient breakdown higher than the static breakdown. DD is a dynamic effect that allows the design of a whole new generation of SOI power devices. Eligible applications are power conditioning circuits in which the device sustains transient voltages higher than bus voltage such as the flyback converter and the resonant circuits. Numerical simulation methods are used to analyse the behaviour of the device together with the effect of temperature, substrate carrier generation time and applied reverse bias on the duration of the transient breakdown phase. The results show that the newly proposed DD SOI device, an SOI power LDMOS using P− substrate, exhibits a static breakdown voltage of 190 V and sustains transient overvoltages up to 280 V. Furthermore, mixed-mode simulation of a complete Class E resonant converter using the proposed DD SOI device is presented