A Low-Cost and Accurate Technique for the Prediction of Load-Pull Contours

Load-pull measurement systems are the most common and powerful instruments used for the design of power amplifiers. They allow to directly obtain output power, efficiency and gain contours which give a clear idea of the electron device optimum termination for the selected operation. Nevertheless, such measurement systems are also very expensive, especially if high frequencies and high power levels are addressed. In this paper, a new technique for drawing load-pull contours is presented which jointly exploits both large-signal low-frequency I/V device measurements and a nonlinear capacitance-based model, the latter one being obtained on the bases of bias- and frequency-dependent small-signal S-parameters. The proposed approach achieves the same level of accuracy of high-frequency measurement systems, using general purpose instrumentation available in microwave laboratories. Different experimental examples, based on power GaN FETs, are provided to demonstrate the validity of the described technique