A methodology for the quantitative electrical characterization of defects at metal/high-k interfaces is proposed. It includes modelling of trapping in the oxide, fit of experiments, and calculation of the system band diagram after trapping. As a result, the defect concentrations and energy levels are extracted. The methodology is demonstrated on metal-oxide-semiconductor systems, but its results can be extended on whatever structure containing an interface between a metal and a high-k dielectric film. (C) 2014 American Vacuum Society
The metal-insulator or metal-amorphous semiconductor blocking contact is still not well understood. ...
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The challenge of interpreting experimental data from capacitance versus voltage (C-V) measurements o...
There are several applications where solid devices are exposed to irradiation. Depending on the oper...
The presence of carrier traps, at the Si-SiO2 interface, is at the origin of various instability phe...
In this paper we present a novel defect spectroscopy technique to investigate the properties of high...
High dielectric constant (high-κ) materials are being developed for both silicon and non-silicon (Ge...
An attempt is made to correlate electrical measurement results to specific defects in the dielectric...
The metal-insulator or metal-amorphous semiconductor blocking contact is still not well understood. ...
High electrical fields are needed inside the accelerating cavities of particle accelerators in order...
This chapter aims to review analytical techniques for the detection of electrically active defects i...
We propose a new defect characterization technique for high-k dielectric stacks in III-V MOSFETs. Th...
Major functioning blocks in modern devices employed in a variety of applications (electronics, energ...
This detailed and up-to-date guide to modern MOS structures describes important tools, cutting-edge ...
This thesis describes investigations in relation to the search for materials with high dielectric co...
A simple and effective method for the extraction of interface trap distribution in ultrathin metal– ...
An interface characterization technique, termed the Fermi-level efficiency (FLE) method, is proposed...
The challenge of interpreting experimental data from capacitance versus voltage (C-V) measurements o...
There are several applications where solid devices are exposed to irradiation. Depending on the oper...
The presence of carrier traps, at the Si-SiO2 interface, is at the origin of various instability phe...
In this paper we present a novel defect spectroscopy technique to investigate the properties of high...
High dielectric constant (high-κ) materials are being developed for both silicon and non-silicon (Ge...
An attempt is made to correlate electrical measurement results to specific defects in the dielectric...
The metal-insulator or metal-amorphous semiconductor blocking contact is still not well understood. ...
High electrical fields are needed inside the accelerating cavities of particle accelerators in order...
This chapter aims to review analytical techniques for the detection of electrically active defects i...