Many cache designs have been proposed to guard against last-level cache, contention-based, side-channel attacks. One of the most well-known implementations, CEASER-S, applies an encryption cypher with a periodically changing key as a cache indexing function. By increasing the re-keying frequency, CEASER-S can defeat an attack. However, this can lead to performance degradation. In this paper, we propose cache logical associativity. By combining this approach with CEASER-S, our cache, CEASER-SH, sacrifices less performance while maintaining the same security level against more advanced contention-based side-channel attacks. For example, compared with CEASER-S, CEASER-SH with a logical associativity of 3 can reduce the miss rate degradation by...
Software cache-based side channel attacks present serious threats to modern computer systems. Using ...
Software cache-based side channel attacks present serious threats to modern computer systems. Using ...
Over the last years, timing channels that exploit resources shared at the microarchitectural level h...
Today, nearly all modern devices, including smartphones, PCs, and cloud servers, benefit significant...
Software cache-based side channel attacks are a serious new class of threats for computers. Unlike p...
Security and trustworthiness are key considerations in designing modern processor hardware. It has b...
Software cache-based side channel attacks present a serious threat to computer systems. Previously p...
Software side channel attacks have become a serious concern with the recent rash of attacks on specu...
Covert channels are a fundamental concept for cryptanalytic side-channel attacks. Covert timing chan...
We expand on the idea, proposed by Kelsey et al. [14], of cache memory being used as a side-channel ...
International audienceMost of the mitigation techniques against access-driven cache side-channel att...
The ongoing miniaturization of semiconductor manufacturing technologies has enabled the integration ...
Contemporary computing employs cache hierarchy to fill the speed gap between processors and main mem...
International audienceSide channels and covert channels can give untrusted applications access to th...
Recent research has produced a number of viable side-channel attack methods based on the data-depend...
Software cache-based side channel attacks present serious threats to modern computer systems. Using ...
Software cache-based side channel attacks present serious threats to modern computer systems. Using ...
Over the last years, timing channels that exploit resources shared at the microarchitectural level h...
Today, nearly all modern devices, including smartphones, PCs, and cloud servers, benefit significant...
Software cache-based side channel attacks are a serious new class of threats for computers. Unlike p...
Security and trustworthiness are key considerations in designing modern processor hardware. It has b...
Software cache-based side channel attacks present a serious threat to computer systems. Previously p...
Software side channel attacks have become a serious concern with the recent rash of attacks on specu...
Covert channels are a fundamental concept for cryptanalytic side-channel attacks. Covert timing chan...
We expand on the idea, proposed by Kelsey et al. [14], of cache memory being used as a side-channel ...
International audienceMost of the mitigation techniques against access-driven cache side-channel att...
The ongoing miniaturization of semiconductor manufacturing technologies has enabled the integration ...
Contemporary computing employs cache hierarchy to fill the speed gap between processors and main mem...
International audienceSide channels and covert channels can give untrusted applications access to th...
Recent research has produced a number of viable side-channel attack methods based on the data-depend...
Software cache-based side channel attacks present serious threats to modern computer systems. Using ...
Software cache-based side channel attacks present serious threats to modern computer systems. Using ...
Over the last years, timing channels that exploit resources shared at the microarchitectural level h...